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comp.dsp Conference Presentations
2004 Comp.dsp Conference Presentations
Below is a synopsis of the Presentations made by comp.dsp Usenet members at the 2004 Comp.dsp Conference held at Danville Signal. The PowerPoint and PDF files that we have on those presentations are available here as well. We hope you find the information useful.
Signal Processing for OFDM Systems by Eric Jacobsen (Intel Corp.)
This presentation explores the requirements imposed by typical multicarrier modulation, like that used in Orthogonal Frequency Division Multiplexed (OFDM) systems, on the signal processing in a typical transceiver. The differences with respect to singlecarrier systems are investigated, and the flexibility and opportunities created by multicarrier modulation are also discussed.
Powerpoint Presentation
Powerpoint Presentation (Print Ready)
Interpolated and Frequency Sampling FIR Filters by Rick Lyons (Besser Associates)
This presentation introduces two computationallyefficient, linearphase, finite impulse response (FIR) filter structures. The Interpolated FIR structure is nonrecursive, while the Frequency Sampling structure is recursive. (It's true, you can build linearphase recursive filters!) While these FIR filter designs have not received their deserved attention in the literature, they definitely belong in your filter design toolbag. Design examples will be discussed showing how these filters can be more efficient than standard ParksMcClellandesigned FIR filters.
OneBit Delta Sigma D/A Conversion  Theory & Implementation by Randy Yates (Sony Ericsson Mobile Communications)
This presentation covers oversampling and noiseshaping in onebit D/A conversion. Classic architectures for interpolation and delta sigma modulation are presented, along with the use of dither in a delta sigma converters. A realworld implementation of a onebit delta sigma D/A converter on DSP hardware within a Sony Ericsson handset will be discussed including psychoacoustic noiseshaping within the modulator. Anomalies encountered in the prototype development of the converter are revealed, their solutions presented, and their sources theorized.
Presentation (part 1)
Presentation (part 2)
QMath Refresher  Understanding Q Math Basics by Shawn Steenhagen (Applied Signal Processing)
This presentation answers questions such as "where does that extra sign bit come from?" and "how do I know how many bits to shift when doing mixed Qmath arithmetic?". Examples are presented to help show the math behind the mixed Qmath rules.It provides some insights into making fixed point software development easier and more intuitive, describing a base set of library functions and #define macros that make C statements like: q15 q15_my_var = Q15(0.33); possible.
Presentation
Powerpoint Presentation
Survey of Forward Error Correction and Its Use in Modern Wireless Applications by Eric Jacobsen (Intel Corp.)
The ability to correct channel induced errors is critical to the reliability of most wireless communications systems, and recent advances in both theory and practice has led to a continually moving stateoftheart in Forward Error Correction for these applications. A brief history of forward error correction is provided to set the context of the discussion. Fundamental theories are covered and how they apply to different approaches in detecting and correcting transmission errors is explored, as well as how channel impairments and system requirements may favor one type of system over another.
Powerpoint Presentation
Powerpoint Presentation (Print Ready)
The Swiss Army Knife of Digital Networks by Rick Lyons (Besser Associates)
This presentation reviews the long list of useful signal processing functions that can be performed with a single digital network. That simple network is an Nthorder comb structure in cascade with a general 2ndorder recursive structure. The process performed by this network is controlled by the network's coefficients. While you may be familiar with 810 signal processing functions performed by this digital network (because it appears, in various forms, inside many DSP applications), its list of possible signal processing functions is 23 (and growing).
Signal to Noise and Numeric Range issues for Direct Form I & II IIR Filters on Modern Analog Devices and TI Digital Signal Processors by Mark Allie (Mark Allie Consulting LLC)
The implementation of IIR filters using fixed point math has been studied in the past by Jon Dattorro, Rhonda Wilson, and others. There are many fine papers on this topic that have been published in the Journal of the Audio Engineering Society. In most cases the comparisons have been made between 16 bit and 24 bit fixed point Digital Signal Processors (DSPs). This was due to the low cost availability of the TI TMS320, AD 21xx and Motorola 56K series of DSPs. The greatest demands came from the professional audio community which choose the Motorola processor. The 56K family offered 24 bit fixed point math where most competing DSPs from TI and Analog Devices utilized 16 bit operands. The general conclusion is that the Direct Form I IIR is superior for fixed point implementations.
There is evidence that 24 bits is not always enough for the recursive data path. This in part has shifted market share to Analog Devices and TI. Both companies offer low cost 32 bit DSPs. This presentation compares IIR filters using Direct Form I or Direct Form II topologies with either a fixed point or floating point implementation. The Analog Devices and TI floating point DSP’s can be configured as native 32 bit fixed point processors and 32 bit IEEE floating point processors. The AD SHARC processor also has an additional 40 bit extended precision IEEE floating point capability. The low cost and extended abilities of these processors suggests there could be a different optimum set of accurate, quiet, efficient filter structures.
The Art of Debugging: What are Commercial Emulators and How are They Used by Dr. Mike Rosing (University of Wisconsin  Madison)
This presentation covers the art of using JTAG emulators, oscilloscopes, and logic analyzers in debugging digital systems. An "art form" is an activity that requires a long time to acquire proficiency, to the point where many operations are instinctive. This presentation will discuss the practical aspects of using the tools of DSP engineering to improve your skills (and instincts) in finding problems in both hardware and software, and why understanding the system as a whole is critical.
Active Noise Control  Application Architectures and Potentials by Shawn Steenhagen (Applied Signal Processing)
This presentation describes the different approaches and architectures for actively controlling random or periodic noise and vibration. The difference between signal identification and system identification techniques are discussed. An evaluation process is presented which helps determine the viability of Active Control as a solution to a noise problem in both an economical and a technical sense.
Presentation
Powerpoint Presentation
Fast Convolution (FFT) Filtering: From Basics to Filter Banks: Part I by Mark Borgerding (Xetron)
Fast Convolution filtering is a powerful technique with which every DSP engineer should be familiar. All but the shortest FIR filters are more efficiently implemented with FFTs rather than direct forms. The longer the filter; the greater the advantage. This presentation begins with the primary forms of fast convolution: overlapadd and overlapsave. These concepts lay the foundation for building parallel filters that perform mixing, filtering, and downsampling in the frequency domain.
Presentation
Slides (1)
Slides (2)
Fast Convolution (FFT) Filtering: From Basics to Filter Banks: Part II by Mark Borgerding (Xetron)
Fast Convolution filtering is a powerful technique with which every DSP engineer should be familiar. All but the shortest FIR filters are more efficiently implemented with FFTs rather than direct forms. The longer the filter; the greater the advantage. This presentation begins with the primary forms of fast convolution: overlapadd and overlapsave. These concepts lay the foundation for building parallel filters that perform mixing, filtering, and downsampling in the frequency domain.
A Survey of Noise Reduction Techniques by Maurice Givens
This presentation provides a tutorial overview of the most widely used noisereduction techniques. The presentation covers the least meansquare (LMS) method using the adaptive noise canceller (ANC) and adaptive line enhancer (ALE), and coefficient shrinkage with decomposition by FFT and wavelet transformations. In addition, spectral (subband) subtraction using FFT, wavelet, frequency sampling, and subband decomposition will be discussed. The presentation will show examples, including speech enhancement using several of the above noisereduction techniques.
USB Fundamentals and Considerations for Digital Signal Processing by Greg Burk (J. Gordon Electronic Design)
Frequency Estimation Techniques by Peter Kootsookos (United Technologies Research Center)
This presentation will examine the frequency estimation and associated problems such as estimation performance, instantaneous frequency estimation, and use (or not) of the analytic signal. Particular techniques to be examined are maximum likelihood, Kay's estimator (and variants) and DFT interpolation.
*** Call for Conference Presenters ***
The success, and value, of the "2004 comp.dsp Conference" will depend heavily on DSP presentations made by our comp.dsp colleagues. As such, we ask that you consider making a technical presentation at the conference.
We're not looking for highly advanced, mathematically complicated, presentations like "cyclotomic polynomials used with tight Gabor frames". Instead, we seek practical, realworld, tutorial presentations that help us broaden and improve our working knowledge of DSP.
Please don't assume that all the other comp.dspers know everything that you know. We can assure you that they do not. It's certain that there is some aspect of DSP that you can teach the rest of us. With that thought in mind, please consider making a presentation.
A list of potential presentation topics would be too large to include here. However, what we have in mind are presentations like:
 What are commercial emulators and how are they used;
 How does the CORDIC algorithm work;
 For what is wavelet processing used;
 How does High Definition TV (HDTV) work;
 What are audio "boost", "cut", and "shelf" filters;
 Are there any fast ways to compute arctangents;
 Is the Hilbert transform useful for anything;
 How do you build hardware systems using VMEbus architectures;
 What are ASICs, FPGAs, and CPLDs;
 How is automatic gain control (AGC) implemented in DSP;
 How is DSP used in motor control;
 What special guitar audio effects are possible;
 How does Voice Over IP (VoIP) work;
 What number formats are possible in fixed point processors;
 What's important about realtime operating systems (RTOS);
 How are A/D and D/A converters tested;
 What is, and who cares about, SpaceTime coding;
 Why is speech processing so complicated;
 What are ZeroIF and NearZeroIF digital receivers;
 How can stable digital oscillators be built;
 How do the various DSP Starter Kits compare;
 How do you test DSP algorithms and DSP systems;
 Why are FFTs used in OFDM communications systems.
The plan is to have speakers create their presentation "slides" using MS Word or PowerPoint, project their slides on a screen using their laptop computers and a VGA projector (supplied by the conference hosts), and spend a half hour to an hour teaching us some aspect of DSP that we didn't know.
If you make a presentation, you will NOT be lecturing to stonefaced strangers, instead you'll be sharing your knowledge with friends. Also, keep in mind that it would good to add to your current resume that you presented a signal processing paper at the "2004 comp.dsp Conference", Cannon Falls, Minnesota.
If you have a tutorial DSP topic on which you'd like to speak, please send a short description of that topic to Al Clark at compdsp@danvillesignal.com. In that description, please describe your topic and estimate the time length of your presentation (e.g., half hour, one hour).
Survey Responses of 2004 COMP.DSP Conference
At the end of the conference, we handed out a survey to gauge how to improve the conference in the future and to solicit ideas for a 2005 COMP.DSP Conference. For each question, we asked what they would change to improve it.
Here are the questions and the responses we've received:
1) The Conference in General:
 Better control / mediation of schedule. Use a timer between breaks / talks to help keep on schedule.
 Have a "demo day" where people can demonstrate reallife things they've worked on.
 Nothing.
 Excellent material. Good fun. Great socializing.
 Good overview of different methods & applications presented by experts familiar with the techniques.
 Most Excellent.
 Very good idea, good presentations, and should continue.
 Excellent. Very right conference for me.
 Nothing to complain about! Pretty much the best conference I've ever been to since I got to hear every talk and meet every attendee.
2) The promotion, website, fees, exposure to prospects:
 Nothing.
 Should advertise in magazines if more people are wanted. Website OK; fees OK.
 Price was too low to miss.
 No problems.
 Let's promote in places other than comp.dsp.
 The fee is reasonable.
3) The Meals and Food (Wed eve, lunches, snacks, dinners):
 They were excellent; eat earlier (supper) if possible.
 Maybe more lowcarbconscious.
 Excellent (2), great, very good (2).
4) The Presentations, Seating, Handouts, etc.:
 All were good.
 Great!, Very good (3), Excellent.
 Great, but may want to incorporate breaks into schedule.
5) What are your ideas on attracting more attendees:
 Advertise. Choose a larger city as a venue.
 Contact Vendor FAEs and have them mail your conference info to their customers.
 Wider distribution of notices.
 More publicity outside comp.dsp
 Through IEEE local Chapters. IEEE HQ'ers do not allow any fliers, but we can contact local DSP chapters.. Making the conference name more formal may also help.
6) Should the conference presentations be tailored to introduce more people to DSP (more intorductory level presentations in addition to advanced)?
 I think mixed may be better; e.g. intro and indepth
 If possible, more than one track. One for intro to DSP and one for advanced concepts, tutorials/ theory & research
 About right.
 May want to have "focus"days. First day beginner. Final day most complex?
 Only if more than one track could be supported.
 No.
 I think a mix of technical levels within the presentations will help, but I'm not sure if beginners and hobbyists have the money/time to go to a conference.
7) Do you have ideas for a possible venue for 2005?
 Ericsson / Sony Ericsson
 Any big city in US
 East coast, west coast, New Orleans, Orlando
 Geekcruises.com
8) Would you attend again in 2005?
 Yes, if I can get to it. I can't afford to fly anywhere.
 Yes (5)
 Probably not, but 2006 would be good.
 Yes, depending on the location.
Photos of the 2004 COMP.DSP Conference
Here's a few photos we've received from conference attendees. We will continue to add photos as we receive them.
More photos also posted by Mark Borgerding at http://www.borgerding.net/comp.dsp/pics/
Mark Borgerding Presenting 
Greg Burk Presenting 
Dr. Mike Rosing's Presentation 
Shawn Steenhagen, Mark Allie and 
Eric Jacobsen and Al Clark 
Dinner on Friday Evening 
Maurice Givens Presenting 
Lunch on Friday 
Emilson Enrique, Peter Xu, Shawn Steenhagen, 
Dr. Mike Rosing, Mark Borgerding, Peter Xu 
Mark Allie, Al Clark and Dr. Mike Rosing 
2004 COMP.DSP Conference Attendees 
comp.dsp Proposed Conference Agenda
The conference agenda listed below is subject to change.
Final Conference Agenda
Presentations on Thursday, July 29th and Friday, July 30th
Thursday, July 29th
9:00 AM 
Signal Processing for OFDM Systems
This presentation explores the
requirements imposed by typical multicarrier modulation, like that
used in Orthogonal Frequency Division Multiplexed (OFDM) systems, on
the signal processing in a typical transceiver. The differences with
respect to singlecarrier systems are investigated, and the flexibility
and opportunities created by multicarrier modulation are also
discussed. 
10:00 AM 
Interpolated and Frequency Sampling FIR Filters
This presentation introduces two computationallyefficient,
linearphase, finite impulse response (FIR) filter structures. The
Interpolated FIR structure is nonrecursive, while the Frequency
Sampling structure is recursive. (It's true, you can build linearphase
recursive filters!) While these FIR filter designs have not received
their deserved attention in the literature, they definitely belong in
your filter design toolbag. Design examples will be discussed
showing how these filters can be more efficient than standard
ParksMcClellandesigned FIR filters. 
11:00 AM 
OneBit Delta Sigma D/A Conversion  Theory & Implementation
This presentation covers oversampling and noiseshaping in onebit
D/A conversion. Classic architectures for interpolation and delta sigma
modulation are presented, along with the use of dither in a delta sigma
converters. A realworld implementation of a onebit delta sigma D/A
converter on DSP hardware within a Sony Ericsson handset will be
discussed including psychoacoustic noiseshaping within the modulator.
Anomalies encountered in the prototype development of the converter are
revealed, their solutions presented, and their sources theorized. 
Noon  Lunch 
1:00 PM 
QMath Refresher  Understanding Q Math Basics This presentation answers questions such as "where does that extra sign bit come from?" and "how do I know how many bits to shift when doing mixed Qmath arithmetic?". Examples are presented to help show the math behind the mixed Qmath rules.It provides some insights into making fixed point software development easier and more intuitive, describing a base set of library functions and #define macros that make C statements like: q15 q15_my_var = Q15(0.33); possible. 
2:00 PM 
Survey of Forward Error Correction and Its Use in Modern Wireless Applications
The ability to correct channel
induced errors is critical to the reliability of most wireless
communications systems, and recent advances in both theory and practice
has led to a continually moving stateoftheart in Forward Error
Correction for these applications. A brief history of forward error
correction is provided to set the context of the discussion.
Fundamental theories are covered and how they apply to different
approaches in detecting and correcting transmission errors is explored,
as well as how channel impairments and system requirements may favor
one type of system over another. 
3:00 PM 
The Swiss Army Knife of Digital Networks
This presentation reviews
the long list of useful signal processing functions that can be
performed with a single digital network. That simple network is an
Nthorder comb structure in cascade with a general 2ndorder recursive
structure. The process performed by this network is controlled by the
network's coefficients. While you may be familiar with 810 signal
processing functions performed by this digital network (because it
appears, in various forms, inside many DSP applications), its list of
possible signal processing functions is 23 (and growing). 
4:00 PM 
Signal
to Noise and Numeric Range issues for Direct Form I & II IIR
Filters on Modern Analog Devices and TI Digital Signal Processors The implementation of IIR filters using fixed point math has been studied in the past by Jon Dattorro, Rhonda Wilson, and others. There are many fine papers on this topic that have been published in the Journal of the Audio Engineering Society. In most cases the comparisons have been made between 16 bit and 24 bit fixed point Digital Signal Processors (DSPs). This was due to the low cost availability of the TI TMS320, AD 21xx and Motorola 56K series of DSPs. The greatest demands came from the professional audio community which choose the Motorola processor. The 56K family offered 24 bit fixed point math where most competing DSPs from TI and Analog Devices utilized 16 bit operands. The general conclusion is that the Direct Form I IIR is superior for fixed point implementations.
There
is evidence that 24 bits is not always enough for the recursive data
path. This in part has shifted market share to Analog Devices and TI.
Both companies offer low cost 32 bit DSPs. This presentation compares
IIR filters using Direct Form I or Direct Form II topologies with
either a fixed point or floating point implementation. The Analog
Devices and TI floating point DSP’s can be configured as native 32 bit
fixed point processors and 32 bit IEEE floating point processors. The
AD SHARC processor also has an additional 40 bit extended precision
IEEE floating point capability. The low cost and extended abilities of
these processors suggests there could be a different optimum set of
accurate, quiet, efficient filter structures. 
Friday, July 30th
9:00 AM 
The Art of Debugging: What are Commercial Emulators and How are They Used
This presentation covers the art of using JTAG emulators, oscilloscopes, and logic analyzers in
debugging digital systems. An "art form" is an activity that requires a
long time to acquire proficiency, to the point where many operations
are instinctive. This presentation will discuss the practical aspects
of using the tools of DSP engineering to improve your skills (and
instincts) in finding problems in both hardware and software, and why
understanding the system as a whole is critical. 
10:00 AM 
Active Noise Control  Application Architectures and Potentials
This
presentation describes the different approaches and architectures for
actively controlling random or periodic noise and vibration. The
difference between signal identification and system identification
techniques are discussed. An evaluation process
is presented which helps determine the viability of Active Control as a
solution to a noise problem in both an economical and a technical sense. 
11:00 AM 
Fast Convolution (FFT) Filtering: From Basics to Filter Banks: Part I
Fast
Convolution filtering is a powerful technique with which every DSP
engineer should be familiar. All but the shortest FIR filters are more
efficiently implemented with FFTs rather than direct forms. The longer
the filter; the greater the advantage. This presentation begins with
the primary forms of fast convolution: overlapadd and overlapsave.
These concepts lay the foundation for building parallel filters that
perform mixing, filtering, and downsampling in the frequency domain. 
Noon  Lunch 
1:00 PM 
Fast Convolution (FFT) Filtering: From Basics to Filter Banks: Part II
Fast
Convolution filtering is a powerful technique with which every DSP
engineer should be familiar. All but the shortest FIR filters are more
efficiently implemented with FFTs rather than direct forms. The longer
the filter; the greater the advantage. This presentation begins with
the primary forms of fast convolution: overlapadd and overlapsave.
These concepts lay the foundation for building parallel filters that
perform mixing, filtering, and downsampling in the frequency domain. 
2:00 PM 
A Survey of Noise Reduction Techniques
This presentation provides a tutorial overview of the most widely used noisereduction techniques. The
presentation covers the least meansquare (LMS) method using the
adaptive noise canceller (ANC) and adaptive line enhancer (ALE), and
coefficient shrinkage with decomposition by FFT and wavelet
transformations. In addition, spectral (subband) subtraction using
FFT, wavelet, frequency sampling, and subband decomposition will be
discussed. The presentation will show examples, including speech enhancement using several of the above noisereduction techniques. 
3:00 PM 
USB Fundamentals and Considerations for Digital Signal Processing 
4:00 PM 
Frequency Estimation Techniques
This
presentation will examine the frequency estimation and associated
problems such as estimation performance, instantaneous frequency
estimation, and use (or not) of the analytic signal. Particular
techniques to be examined are maximum likelihood, Kay's estimator (and
variants) and DFT interpolation.

Please contact us with your questions or abstract at compdsp@danvillesignal.com